--- old/./README.xbuild	2015-01-26 17:25:38.072839935 -0500
+++ new/./README.xbuild	2015-01-26 17:25:38.080121839 -0500
@@ -124,9 +124,54 @@
 
 cd uts; dmake install
 
-You now have a lovely unix and boot_archive pair in bcm2835/unix (raspberry
-pi) and qvpb/unix (qemu versatilepb).  These should be booted with a kernel
-command line mimicing that of the boot_archive (regardless of the path of the
-unix you actually provide).  For example: kernel /platform/bcm2835/kernel/unix
--Bconsole=text
+You now have a lovely unix and boot_archive pair in bcm2835/unix (Raspberry
+Pi) and qvpb/unix (qemu versatilepb).
 
+Step 4) Boot
+
+Now that you have the gate built, you can try to boot the kernel.  This is
+where things diverge between qemu and the Raspberry Pi.
+
+Booting qemu is very easy:
+
+qemu-system-arm \
+	-kernel $PROTO/platform/qvpb/kernel/loader \
+	-initrd $PROTO/platform/qvpb/kernel/initrd \
+	-machine versatilepb \
+	-cpu arm1176 \
+	-m 512 \
+	-no-reboot \
+	-nographic \
+	-append 'kernel /platform/qvpb/kernel/unix -Bconsole=uart'
+
+The loader and kernel messages should appear in the same terminal.
+
+Booting on real hardware is a bit more involved.
+
+  a) Create a FAT16 or FAT32 partition on the SD card.  You'll want it to be
+     at least 40 MB.
+
+  b) Create a config.txt on the partition:
+
+	gpu_mem=64
+	kernel=loader
+	initramfs initrd 0x00800000
+
+  c) Create a cmdline.txt on the partition:
+
+	kernel /platform/bcm2835/kernel/unix -Bconsole=uart
+
+  d) Place Raspberry Pi firmware onto the partition.  You can download
+     latest firmware from
+     https://github.com/raspberrypi/firmware/tree/master/boot. The firmware
+     from January 24th, 2015 is known to work.
+
+	0e52c8cdbfd21631746d6fcdc8f2750af39f4287  bootcode.bin
+	aba25d795eaddafd5c8ece3de18873b9928eb6f7  fixup_cd.dat
+	38e55d60f896738eec30d0ca4f62b68e48e99184  fixup.dat
+	4867e6eab84bb4138e812993112b6a05b7930b89  fixup_x.dat
+	fa993851acba366d9e37d59a1d9e9de84b19173f  start_cd.elf
+	356060e0f44742d8835294a211b812efcac29f66  start.elf
+	b7f01f90d995a36c9d765fd1f4d95a5fcdfd7e41  start_x.elf
+
+  e) Copy $PROTO/platform/bcm2835/kernel/{loader,initrd} onto the partition.
--- old/usr/src/lib/libdisasm/common/dis_arm.c	2015-01-26 17:25:38.287952737 -0500
+++ new/usr/src/lib/libdisasm/common/dis_arm.c	2015-01-26 17:25:38.295608420 -0500
@@ -25,6 +25,7 @@
 
 #include "libdisasm_impl.h"
 
+extern size_t strlen(const char *);
 extern size_t strlcat(char *, const char *, size_t);
 
 /*
@@ -393,20 +394,20 @@
  * them.
  */
 static const char *arm_cond_names[] = {
-	"EQ",		/* Equal */
-	"NE",		/* Not Equal */
-	"CS/HS",	/* Carry set/unsigned higher or same */
-	"CC/LO",	/* Carry clear/unsigned lower */
-	"MI",		/* Minus/negative */
-	"PL",		/* Plus/positive or zero */
-	"VS",		/* Overflow */
-	"VC",		/* No overflow */
-	"HI",		/* Unsigned higher */
-	"LS",		/* Unsigned lower or same */
-	"GE",		/* Signed greater than or equal */
-	"LT",		/* Signed less than */
-	"GT",		/* Signed greater than */
-	"LE",		/* Signed less than or equal */
+	"eq",		/* Equal */
+	"ne",		/* Not Equal */
+	"cs/hs",	/* Carry set/unsigned higher or same */
+	"cc/lo",	/* Carry clear/unsigned lower */
+	"mi",		/* Minus/negative */
+	"pl",		/* Plus/positive or zero */
+	"vs",		/* Overflow */
+	"vc",		/* No overflow */
+	"hi",		/* Unsigned higher */
+	"ls",		/* Unsigned lower or same */
+	"ge",		/* Signed greater than or equal */
+	"lt",		/* Signed less than */
+	"gt",		/* Signed greater than */
+	"le",		/* Signed less than or equal */
 	"",		/* AL - Always (unconditional) */
 	NULL		/* Not a condition code */
 };
@@ -435,22 +436,22 @@
  * which register in question we're working with.
  */
 static const char *arm_reg_names[] = {
-	"R0",
-	"R1",
-	"R2",
-	"R3",
-	"R4",
-	"R5",
-	"R6",
-	"R7",
-	"R8",
-	"R9",
-	"R10",
-	"R11",
-	"IP",	/* Alt for R12 */
-	"SP",	/* Alt for R13 */
-	"LR",	/* Alt for R14 */
-	"PC"	/* Alt for R15 */
+	"r0",
+	"r1",
+	"r2",
+	"r3",
+	"r4",
+	"r5",
+	"r6",
+	"r7",
+	"r8",
+	"fp",	/* Alt for r9 */
+	"r10",
+	"r11",
+	"ip",	/* Alt for r12 */
+	"sp",	/* Alt for r13 */
+	"lr",	/* Alt for r14 */
+	"pc"	/* Alt for r15 */
 };
 
 typedef enum arm_reg {
@@ -499,22 +500,22 @@
  * processing instructions.
  */
 static const char *arm_dpi_opnames[] = {
-	"AND",	/* Logical AND */
-	"EOR",	/* Logical Exclusive OR */
-	"SUB",	/* Subtract */
-	"RSB",	/* Reverse Subtract */
-	"ADD",	/* Add */
-	"ADC",	/* Add with Carry */
-	"SBC",	/* Subtract with Carry */
-	"RSC",	/* Reverse Subtract with Carry */
-	"TST",	/* Test */
-	"TEQ",	/* Test Equivalence */
-	"CMP",	/* Compare */
-	"CMN",	/* Compare negated */
-	"ORR",	/* Logical (inclusive) OR */
-	"MOV",	/* Move */
-	"BIC",	/* Bit clear */
-	"MVN"	/* Move not */
+	"and",	/* Logical AND */
+	"eor",	/* Logical Exclusive OR */
+	"sub",	/* Subtract */
+	"rsb",	/* Reverse Subtract */
+	"add",	/* Add */
+	"adc",	/* Add with Carry */
+	"sbc",	/* Subtract with Carry */
+	"rsc",	/* Reverse Subtract with Carry */
+	"tst",	/* Test */
+	"teq",	/* Test Equivalence */
+	"cmp",	/* Compare */
+	"cmn",	/* Compare negated */
+	"orr",	/* Logical (inclusive) OR */
+	"mov",	/* Move */
+	"bic",	/* Bit clear */
+	"mvn"	/* Move not */
 };
 
 typedef enum arm_dpi_opcode {
@@ -537,11 +538,11 @@
 } arm_dpi_opcode_t;
 
 const char *arm_dpi_shifts[] = {
-	"LSL",	/* Logical shift left */
-	"LSR",	/* Logical shift right */
-	"ASR",	/* Arithmetic shift right */
-	"ROR",	/* Rotate right */
-	"RRX"	/* Rotate right with extend. This is a special case of ROR */
+	"lsl",	/* Logical shift left */
+	"lsr",	/* Logical shift right */
+	"asr",	/* Arithmetic shift right */
+	"ror",	/* Rotate right */
+	"rrx"	/* Rotate right with extend. This is a special case of ror */
 };
 
 typedef enum arm_dpi_shift_code {
@@ -549,7 +550,7 @@
 	DPI_S_LSR,	/* Logical shift right */
 	DPI_S_ASR,	/* Arithmetic shift right */
 	DPI_S_ROR,	/* Rotate right */
-	DPI_S_RRX,	/* Rotate right with extend. Special case of ROR */
+	DPI_S_RRX,	/* Rotate right with extend. Special case of ror */
 	DPI_S_NONE	/* No shift code */
 } arm_dpi_shift_code_t;
 
@@ -594,10 +595,10 @@
  * do this by doing P << 1 | U.
  */
 static const char *arm_lsm_mode_names[] = {
-	"DA",
-	"IA",
-	"DB",
-	"IB"
+	"da",
+	"ia",
+	"db",
+	"ib"
 };
 
 /*
@@ -629,39 +630,39 @@
  * extended control and dsp instructino section.
  */
 static const char *arm_cdsp_sat_opnames[] = {
-	"ADD",
-	"SUB",
-	"DADD",
-	"DSUB"
+	"add",
+	"sub",
+	"dadd",
+	"dsub"
 };
 
 static const char *arm_padd_p_names[] = {
 	NULL,	/* 000 */
-	"S",	/* 001 */
-	"Q",	/* 010 */
-	"SH",	/* 011 */
+	"s",	/* 001 */
+	"q",	/* 010 */
+	"sh",	/* 011 */
 	NULL,	/* 100 */
-	"U",	/* 101 */
-	"UQ",	/* 110 */
-	"UH",	/* 111 */
+	"u",	/* 101 */
+	"uq",	/* 110 */
+	"uh",	/* 111 */
 };
 
 static const char *arm_padd_i_names[] = {
-	"ADD16",	/* 000 */
-	"ADDSUBX",	/* 001 */
-	"SUBADDX",	/* 010 */
-	"SUB16",	/* 011 */
-	"ADD8",		/* 100 */
+	"add16",	/* 000 */
+	"addsubx",	/* 001 */
+	"subaddx",	/* 010 */
+	"sub16",	/* 011 */
+	"add8",		/* 100 */
 	NULL,		/* 101 */
 	NULL,		/* 110 */
-	"SUB8",		/* 111 */
+	"sub8",		/* 111 */
 };
 
 static const char *arm_extend_rot_names[] = {
 	"",		/* 0b00, ROR #0 */
-	", ROR #8",	/* 0b01 */
-	", ROR #16",	/* 0b10 */
-	", ROR #24"	/* 0b11 */
+	", ror #8",	/* 0b01 */
+	", ror #16",	/* 0b10 */
+	", ror #24"	/* 0b11 */
 };
 
 /*
@@ -778,7 +779,7 @@
 		len = snprintf(buf, buflen, "%s%s%s %s",
 		    arm_dpi_opnames[dpi_inst.dpii_op],
 		    arm_cond_names[dpi_inst.dpii_cond],
-		    dpi_inst.dpii_sbit != 0 ? "S" : "",
+		    dpi_inst.dpii_sbit != 0 ? "s" : "",
 		    arm_reg_names[dpi_inst.dpii_rd]);
 		break;
 	case DPI_OP_CMP:
@@ -794,7 +795,7 @@
 		len = snprintf(buf, buflen,
 		    "%s%s%s %s, %s", arm_dpi_opnames[dpi_inst.dpii_op],
 		    arm_cond_names[dpi_inst.dpii_cond],
-		    dpi_inst.dpii_sbit != 0 ? "S" : "",
+		    dpi_inst.dpii_sbit != 0 ? "s" : "",
 		    arm_reg_names[dpi_inst.dpii_rd],
 		    arm_reg_names[dpi_inst.dpii_rn]);
 		break;
@@ -830,7 +831,7 @@
 			break;
 		}
 		if (dpi_inst.dpii_un.dpii_si.dpiss_code == DPI_S_RRX) {
-			len = snprintf(buf, buflen, ", %s RRX",
+			len = snprintf(buf, buflen, ", %s rrx",
 			    arm_reg_names[dpi_inst.dpii_un.dpii_si.dpiss_targ]);
 			break;
 		}
@@ -900,9 +901,9 @@
 	rd = (in & ARM_LS_RD_MASK) >> ARM_LS_RD_SHIFT;
 	rn = (in & ARM_LS_RN_MASK) >> ARM_LS_RN_SHIFT;
 
-	len = snprintf(buf, buflen, "%s%s%s%s %s, ", lbit != 0 ? "LDR" : "STR",
-	    arm_cond_names[cc], bbit != 0 ? "B" : "",
-	    (pbit == 0 && wbit != 0) ? "T" : "",
+	len = snprintf(buf, buflen, "%s%s%s%s %s, ", lbit != 0 ? "ldr" : "str",
+	    arm_cond_names[cc], bbit != 0 ? "b" : "",
+	    (pbit == 0 && wbit != 0) ? "t" : "",
 	    arm_reg_names[rd]);
 	if (len >= buflen)
 		return (-1);
@@ -988,6 +989,66 @@
 	return (len < buflen ? 0 : -1);
 }
 
+static void
+print_range(char **bufp, size_t *buflenp, uint16_t regs, uint16_t precede)
+{
+	char *buf = *bufp;
+	size_t buflen = *buflenp;
+	boolean_t cont = B_FALSE;
+	int minreg = -1;
+	int i;
+
+	*buf = '\0';
+
+	if (precede && regs)
+		strlcat(buf, ", ", buflen);
+
+	for (i = 0; i < 16; i++) {
+		boolean_t present = (regs & (1 << i)) != 0;
+		boolean_t lastreg = (regs & (2 << i)) == 0;
+
+		if (!present)
+			continue;
+
+		if (minreg == -1) {
+			if (cont)
+				strlcat(buf, ", ", buflen);
+
+			strlcat(buf, arm_reg_names[i], buflen);
+
+			if (!lastreg)
+				minreg = i;
+		} else {
+			if (lastreg) {
+				strlcat(buf, "-", buflen);
+				strlcat(buf, arm_reg_names[i], buflen);
+				minreg = -1;
+			}
+		}
+
+		cont = B_TRUE;
+	}
+
+	*bufp += strlen(buf);
+	*buflenp -= strlen(buf);
+}
+
+static size_t
+print_reg_list(char *buf, size_t buflen, uint16_t regs)
+{
+	char *save = buf;
+
+	print_range(&buf, &buflen, regs & 0x01ff, 0);
+	print_range(&buf, &buflen, regs & 0x0200, regs & 0x01ff); /* fp */
+	print_range(&buf, &buflen, regs & 0x0c00, regs & 0x03ff);
+	print_range(&buf, &buflen, regs & 0x1000, regs & 0x0fff); /* ip */
+	print_range(&buf, &buflen, regs & 0x2000, regs & 0x1fff); /* sp */
+	print_range(&buf, &buflen, regs & 0x4000, regs & 0x3fff); /* lr */
+	print_range(&buf, &buflen, regs & 0x8000, regs & 0x7fff); /* pc */
+
+	return (strlen(save));
+}
+
 /*
  * This handles load and store multiple instructions. The general format is as
  * follows:
@@ -1037,7 +1098,7 @@
 static int
 arm_dis_ldstr_multi(uint32_t in, char *buf, size_t buflen)
 {
-	int sbit, wbit, lbit, ii, cont;
+	int sbit, wbit, lbit;
 	uint16_t regs, addr_mode;
 	arm_reg_t rn;
 	arm_cond_code_t cc;
@@ -1051,31 +1112,27 @@
 	regs = in & ARM_LSM_RLIST_MASK;
 	addr_mode = (in & ARM_LSM_ADDR_MASK) >> ARM_LSM_ADDR_SHIFT;
 
-	len = snprintf(buf, buflen, "%s%s%s %s%s, { ",
-	    lbit != 0 ? "LDM" : "STM",
-	    arm_cond_names[cc],
-	    arm_lsm_mode_names[addr_mode],
-	    arm_reg_names[rn],
-	    wbit != 0 ? "!" : "");
-
-	cont = 0;
-	for (ii = 0; ii < 16; ii++) {
-		if (!(regs & (1 << ii)))
-			continue;
+	if ((lbit == 0 && addr_mode == 2 && rn == ARM_REG_R13 && wbit != 0) ||
+	    (lbit != 0 && addr_mode == 1 && rn == ARM_REG_R13 && wbit != 0))
+		len = snprintf(buf, buflen, "%s%s { ",
+		    lbit != 0 ? "pop" : "push",
+		    arm_cond_names[cc]);
+	else
+		len = snprintf(buf, buflen, "%s%s%s %s%s, { ",
+		    lbit != 0 ? "ldm" : "stm",
+		    arm_cond_names[cc],
+		    arm_lsm_mode_names[addr_mode],
+		    arm_reg_names[rn],
+		    wbit != 0 ? "!" : "");
 
-		len += snprintf(buf + len, buflen - len, "%s%s",
-		    cont > 0 ? ", " : "", arm_reg_names[ii]);
-		if (len >= buflen)
-			return (-1);
-		cont++;
-	}
+	len += print_reg_list(buf + len, buflen - len, regs);
 
 	len += snprintf(buf + len, buflen - len, " }%s", sbit != 0 ? "^" : "");
 	return (len >= buflen ? -1 : 0);
 }
 
 /*
- * Here we need to handle miscillaneous loads and stores. This is used to load
+ * Here we need to handle miscellaneous loads and stores. This is used to load
  * and store signed and unsigned half words. To load a signed byte. And to load
  * and store double words. There is no specific store routines for signed bytes
  * and halfwords as they are supposed to use the SRB and STRH. There are two
@@ -1128,18 +1185,18 @@
 	hbit = in & ARM_ELS_SBIT_MASK;
 
 	if (lbit || (sbit && hbit == 0))
-		iname = "LDR";
+		iname = "ldr";
 	else
-		iname = "STR";
+		iname = "str";
 
 	if (sbit == 0 && hbit)
-		suffix = "H";
+		suffix = "h";
 	else if (lbit == 0)
-		suffix = "D";
+		suffix = "d";
 	else if (sbit && hbit == 0)
-		suffix = "SB";
+		suffix = "sb";
 	else if (sbit && hbit)
-		suffix = "SH";
+		suffix = "sh";
 
 	cc = (in & ARM_CC_MASK) >> ARM_CC_SHIFT;
 	rn = (in & ARM_ELS_RN_MASK) >> ARM_ELS_RN_SHIFT;
@@ -1202,9 +1259,9 @@
 	rd = (in & ARM_ELS_RD_MASK) >> ARM_ELS_RD_SHIFT;
 	rm = in & ARM_ELS_RN_MASK;
 
-	if (snprintf(buf, buflen, "SWP%s%s %s, %s, [%s]",
+	if (snprintf(buf, buflen, "swp%s%s %s, %s, [%s]",
 	    arm_cond_names[cc],
-	    (in & ARM_ELS_SWAP_BYTE_MASK) ? "B" : "",
+	    (in & ARM_ELS_SWAP_BYTE_MASK) ? "b" : "",
 	    arm_reg_names[rd], arm_reg_names[rm], arm_reg_names[rn]) >=
 	    buflen)
 		return (-1);
@@ -1229,8 +1286,8 @@
 	rm = in & ARM_ELS_RN_MASK;
 	lbit = in & ARM_ELS_LBIT_MASK;
 
-	len = snprintf(buf, buflen, "%s%sEX %s, ",
-	    lbit != 0 ? "LDR" : "STR",
+	len = snprintf(buf, buflen, "%s%sex %s, ",
+	    lbit != 0 ? "ldr" : "str",
 	    arm_cond_names[cc], arm_reg_names[rd]);
 	if (len >= buflen)
 		return (-1);
@@ -1292,29 +1349,29 @@
 
 	if ((in & ARM_EMULT_MA_MASK) == 0) {
 		if (in & ARM_EMULT_ABIT_MASK) {
-			len = snprintf(buf, buflen, "MLA%s%s %s, %s, %s, %s",
+			len = snprintf(buf, buflen, "mla%s%s %s, %s, %s, %s",
 			    arm_cond_names[cc],
-			    (in & ARM_EMULT_SBIT_MASK) ? "S" : "",
+			    (in & ARM_EMULT_SBIT_MASK) ? "s" : "",
 			    arm_reg_names[rd], arm_reg_names[rm],
 			    arm_reg_names[rs], arm_reg_names[rs]);
 		} else {
-			len = snprintf(buf, buflen, "MUL%s%s %s, %s, %s",
+			len = snprintf(buf, buflen, "mul%s%s %s, %s, %s",
 			    arm_cond_names[cc],
-			    (in & ARM_EMULT_SBIT_MASK) ? "S" : "",
+			    (in & ARM_EMULT_SBIT_MASK) ? "s" : "",
 			    arm_reg_names[rd], arm_reg_names[rm],
 			    arm_reg_names[rs]);
 
 		}
 	} else if ((in & ARM_EMULT_UMA_MASK) == ARM_EMULT_UMA_TARG) {
-		len = snprintf(buf, buflen, "UMAAL%s %s, %s, %s, %s",
+		len = snprintf(buf, buflen, "umaal%s %s, %s, %s, %s",
 		    arm_cond_names[cc], arm_reg_names[rn], arm_reg_names[rd],
 		    arm_reg_names[rm], arm_reg_names[rs]);
 	} else if ((in & ARM_EMULT_MAL_MASK) == ARM_EMULT_MAL_TARG) {
 		len = snprintf(buf, buflen, "%s%s%s%s %s, %s, %s, %s",
-		    (in & ARM_EMULT_UNBIT_MASK) ? "S" : "U",
-		    (in & ARM_EMULT_ABIT_MASK) ? "MLAL" : "MULL",
+		    (in & ARM_EMULT_UNBIT_MASK) ? "s" : "u",
+		    (in & ARM_EMULT_ABIT_MASK) ? "mlal" : "mull",
 		    arm_cond_names[cc],
-		    (in & ARM_EMULT_SBIT_MASK) ? "S" : "",
+		    (in & ARM_EMULT_SBIT_MASK) ? "s" : "",
 		    arm_reg_names[rn], arm_reg_names[rd], arm_reg_names[rm],
 		    arm_reg_names[rs]);
 	} else {
@@ -1341,17 +1398,17 @@
 
 	if ((in & ARM_CDSP_MRS_MASK) == ARM_CDSP_MRS_TARG) {
 		rd = (in & ARM_CDSP_RD_MASK) >> ARM_CDSP_RD_SHIFT;
-		if (snprintf(buf, buflen, "MRS%s %s, %s", arm_cond_names[cc],
+		if (snprintf(buf, buflen, "mrs%s %s, %s", arm_cond_names[cc],
 		    arm_reg_names[rd],
-		    (in & ARM_CDSP_STATUS_RBIT) != 0 ? "SPSR" : "CPSR") >=
+		    (in & ARM_CDSP_STATUS_RBIT) != 0 ? "spsr" : "cpsr") >=
 		    buflen)
 			return (-1);
 		return (0);
 	}
 
 	field = (in & ARM_CDSP_MSR_F_MASK) >> ARM_CDSP_MSR_F_SHIFT;
-	len = snprintf(buf, buflen, "MSR%s %s_%s, ", arm_cond_names[cc],
-	    (in & ARM_CDSP_STATUS_RBIT) != 0 ? "SPSR" : "CPSR",
+	len = snprintf(buf, buflen, "msr%s %s_%s, ", arm_cond_names[cc],
+	    (in & ARM_CDSP_STATUS_RBIT) != 0 ? "spsr" : "cpsr",
 	    arm_cdsp_msr_field_names[field]);
 	if (len >= buflen)
 		return (-1);
@@ -1402,9 +1459,9 @@
 	    (in & ARM_CDSP_BEX_LOW_MASK) != ARM_CDSP_BEX_NLOW_TARG) {
 		rm = in & ARM_CDSP_RM_MASK;
 		imm = (in & ARM_CDSP_BEX_TYPE_MASK) >> ARM_CDSP_BEX_TYPE_SHIFT;
-		if (snprintf(buf, buflen, "B%s%s %s",
-		    imm == ARM_CDSP_BEX_TYPE_X ? "X" :
-		    imm == ARM_CDSP_BEX_TYPE_J ? "XJ" : "LX",
+		if (snprintf(buf, buflen, "b%s%s %s",
+		    imm == ARM_CDSP_BEX_TYPE_X ? "x" :
+		    imm == ARM_CDSP_BEX_TYPE_J ? "xj" : "lx",
 		    arm_cond_names[cc], arm_reg_names[rm]) >= buflen)
 			return (-1);
 		return (0);
@@ -1414,7 +1471,7 @@
 	if ((in & ARM_CDSP_CLZ_MASK) == ARM_CDSP_CLZ_TARG) {
 		rd = (in & ARM_CDSP_RD_MASK) >> ARM_CDSP_RD_SHIFT;
 		rm = in & ARM_CDSP_RM_MASK;
-		if (snprintf(buf, buflen, "CLZ%s %s, %s", arm_cond_names[cc],
+		if (snprintf(buf, buflen, "clz%s %s, %s", arm_cond_names[cc],
 		    arm_reg_names[rd], arm_reg_names[rm]) >= buflen)
 			return (-1);
 		return (0);
@@ -1425,7 +1482,7 @@
 		rn = (in & ARM_CDSP_RN_MASK) >> ARM_CDSP_RN_SHIFT;
 		rm = in & ARM_CDSP_RM_MASK;
 		imm = (in & ARM_CDSP_SAT_OP_MASK) >> ARM_CDSP_SAT_OP_SHIFT;
-		if (snprintf(buf, buflen, "Q%s%s %s, %s, %s",
+		if (snprintf(buf, buflen, "q%s%s %s, %s, %s",
 		    arm_cdsp_sat_opnames[imm], arm_cond_names[cc],
 		    arm_reg_names[rd], arm_reg_names[rm],
 		    arm_reg_names[rn]) >= buflen)
@@ -1447,7 +1504,7 @@
 		    ARM_CDSP_BKPT_UIMM_SHIFT;
 		imm <<= 4;
 		imm |= (in & ARM_CDSP_BKPT_LIMM_MASK);
-		if (snprintf(buf, buflen, "BKPT %d", imm) >= buflen)
+		if (snprintf(buf, buflen, "bkpt %d", imm) >= buflen)
 			return (1);
 		return (0);
 	}
@@ -1479,9 +1536,9 @@
 
 		switch (op) {
 		case 0:
-			len = snprintf(buf, buflen, "SMLA%s%s%s %s, %s, %s, %s",
-			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "T" : "B",
-			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "T" : "B",
+			len = snprintf(buf, buflen, "smla%s%s%s %s, %s, %s, %s",
+			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "t" : "b",
+			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "t" : "b",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rm], arm_reg_names[rs],
 			    arm_reg_names[rn]);
@@ -1489,32 +1546,32 @@
 		case 1:
 			if (in & ARM_CDSP_SMUL_X_MASK) {
 				len = snprintf(buf, buflen,
-				    "SMULW%s%s %s, %s, %s",
-				    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "T" :
-				    "B", arm_cond_names[cc], arm_reg_names[rd],
+				    "smulw%s%s %s, %s, %s",
+				    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "t" :
+				    "b", arm_cond_names[cc], arm_reg_names[rd],
 				    arm_reg_names[rm], arm_reg_names[rs]);
 			} else {
 				len = snprintf(buf, buflen,
-				    "SMLAW%s%s %s, %s, %s %s",
-				    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "T" :
-				    "B", arm_cond_names[cc], arm_reg_names[rd],
+				    "smlaw%s%s %s, %s, %s %s",
+				    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "t" :
+				    "b", arm_cond_names[cc], arm_reg_names[rd],
 				    arm_reg_names[rm], arm_reg_names[rs],
 				    arm_reg_names[rn]);
 			}
 			break;
 		case 2:
 			len = snprintf(buf, buflen,
-			    "SMLAL%s%s%s %s, %s, %s, %s",
-			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "T" : "B",
-			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "T" : "B",
+			    "smlal%s%s%s %s, %s, %s, %s",
+			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "t" : "b",
+			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "t" : "b",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rn], arm_reg_names[rm],
 			    arm_reg_names[rs]);
 			break;
 		case 3:
-			len = snprintf(buf, buflen, "SMUL%s%s%s %s, %s, %s",
-			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "T" : "B",
-			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "T" : "B",
+			len = snprintf(buf, buflen, "smul%s%s%s %s, %s, %s",
+			    (in & ARM_CDSP_SMUL_X_MASK) != 0 ? "t" : "b",
+			    (in & ARM_CDSP_SMUL_Y_MASK) != 0 ? "t" : "b",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rm], arm_reg_names[rs]);
 			break;
@@ -1564,8 +1621,8 @@
 	else
 		ccn = arm_cond_names[cc];
 
-	len = snprintf(buf, buflen, "%s%s %s, #%d, %s, %s, C%s",
-	    (in & ARM_COPROC_DRT_DIR_MASK) != 0 ? "MRRC" : "MCRR",
+	len = snprintf(buf, buflen, "%s%s %s, #%d, %s, %s, c%s",
+	    (in & ARM_COPROC_DRT_DIR_MASK) != 0 ? "mrrc" : "mcrr",
 	    ccn, arm_coproc_names[coproc], op, arm_reg_names[rd],
 	    arm_reg_names[rn], arm_reg_names[rm]);
 	return (len >= buflen ? -1 : 0);
@@ -1630,8 +1687,8 @@
 	else
 		ccn = arm_cond_names[cc];
 
-	len = snprintf(buf, buflen, "%s%s%s %s, C%s, ",
-	    lbit != 0 ? "LDC" : "STC", ccn, nbit != 0 ? "L" : "",
+	len = snprintf(buf, buflen, "%s%s%s %s, c%s, ",
+	    lbit != 0 ? "ldc" : "stc", ccn, nbit != 0 ? "l" : "",
 	    arm_coproc_names[coproc], arm_reg_names[rd]);
 	if (len >= buflen)
 		return (-1);
@@ -1685,7 +1742,7 @@
 	else
 		ccn = arm_cond_names[cc];
 
-	if (snprintf(buf, buflen, "CDP%s %s, #%d, C%s, C%s, C%s, #%d", ccn,
+	if (snprintf(buf, buflen, "cdp%s %s, #%d, c%s, c%s, c%s, #%d", ccn,
 	    arm_coproc_names[coproc], op1, arm_reg_names[rd],
 	    arm_reg_names[rn], arm_reg_names[rm], op2) >= buflen)
 		return (-1);
@@ -1726,8 +1783,8 @@
 	else
 		ccn = arm_cond_names[cc];
 
-	len = snprintf(buf, buflen, "%s%s %s, #%d, %s, C%s, C%s",
-	    (in & ARM_COPROC_CRT_DIR_MASK) != 0 ? "MRC" : "MCR", ccn,
+	len = snprintf(buf, buflen, "%s%s %s, #%d, %s, c%s, c%s",
+	    (in & ARM_COPROC_CRT_DIR_MASK) != 0 ? "mrc" : "mcr", ccn,
 	    arm_coproc_names[coproc], op1, arm_reg_names[rd],
 	    arm_reg_names[rn], arm_reg_names[rm]);
 	if (len >= buflen)
@@ -1781,14 +1838,14 @@
 			return (-1);
 
 		if (imm != 0)
-			len = snprintf(buf, buflen, "CPS%s %s%s%s%s",
-			    imm == 2 ? "IE" : "ID",
+			len = snprintf(buf, buflen, "cps%s %s%s%s%s",
+			    imm == 2 ? "ie" : "id",
 			    (in & ARM_UNI_CPS_A_MASK) ? "a" : "",
 			    (in & ARM_UNI_CPS_I_MASK) ? "i" : "",
 			    (in & ARM_UNI_CPS_F_MASK) ? "f" : "",
 			    (in & ARM_UNI_CPS_MMOD_MASK) ? " ," : "");
 		else
-			len = snprintf(buf, buflen, "CPS ");
+			len = snprintf(buf, buflen, "cps ");
 		if (len >= buflen)
 			return (-1);
 
@@ -1801,7 +1858,7 @@
 
 	if ((in & ARM_UNI_SE_MASK) == ARM_UNI_SE_TARG) {
 		if (snprintf(buf, buflen, "SETEND %s",
-		    (in & ARM_UNI_SE_BE_MASK) ? "BE" : "LE") >= buflen)
+		    (in & ARM_UNI_SE_BE_MASK) ? "be" : "le") >= buflen)
 			return (-1);
 		return (0);
 	}
@@ -1816,7 +1873,7 @@
 	if ((in & ARM_UNI_PLD_MASK) == ARM_UNI_PLD_TARG) {
 		rn = (in & ARM_LS_RN_MASK) >> ARM_LS_RN_SHIFT;
 		if ((in & ARM_LS_IBIT_MASK) == 0) {
-			if (snprintf(buf, buflen, "PLD [%s, #%s%d",
+			if (snprintf(buf, buflen, "pld [%s, #%s%d",
 			    arm_reg_names[rn],
 			    (in & ARM_LS_UBIT_MASK) != 0 ? "" : "-",
 			    in & ARM_LS_IMM_MASK) >= buflen)
@@ -1825,7 +1882,7 @@
 		}
 
 		rm = in & ARM_LS_REG_RM_MASK;
-		len = snprintf(buf, buflen, "PLD [%s, %s%s", arm_reg_names[rn],
+		len = snprintf(buf, buflen, "pld [%s, %s%s", arm_reg_names[rn],
 		    (in & ARM_LS_UBIT_MASK) != 0 ? "" : "-",
 		    arm_reg_names[rm]);
 		if (len >= buflen)
@@ -1861,7 +1918,7 @@
 	 */
 	if ((in & ARM_UNI_SRS_MASK) == ARM_UNI_SRS_TARG) {
 		imm = (in & ARM_LSM_ADDR_MASK) >> ARM_LSM_ADDR_SHIFT;
-		if (snprintf(buf, buflen, "SRS%s #%d%s",
+		if (snprintf(buf, buflen, "srs%s #%d%s",
 		    arm_lsm_mode_names[imm],
 		    in & ARM_UNI_SRS_MODE_MASK,
 		    (in & ARM_UNI_SRS_WBIT_MASK) != 0 ? "!" : "") >= buflen)
@@ -1876,7 +1933,7 @@
 	if ((in & ARM_UNI_RFE_MASK) == ARM_UNI_RFE_TARG) {
 		imm = (in & ARM_LSM_ADDR_MASK) >> ARM_LSM_ADDR_SHIFT;
 		rn = (in & ARM_LS_RN_MASK) >> ARM_LS_RN_SHIFT;
-		if (snprintf(buf, buflen, "RFE%s %s%s", arm_lsm_mode_names[imm],
+		if (snprintf(buf, buflen, "rfe%s %s%s", arm_lsm_mode_names[imm],
 		    arm_reg_names[rn],
 		    (in & ARM_UNI_RFE_WBIT_MASK) != 0 ? "!" : "") >= buflen)
 			return (-1);
@@ -1884,7 +1941,7 @@
 	}
 
 	if ((in & ARM_UNI_BLX_MASK) == ARM_UNI_BLX_TARG) {
-		if (snprintf(buf, buflen, "BLX %d",
+		if (snprintf(buf, buflen, "blx %d",
 		    in & ARM_UNI_BLX_IMM_MASK) >= buflen)
 			return (-1);
 		return (0);
@@ -1929,8 +1986,8 @@
 	else
 		addr &= ARM_BRANCH_POS_SIGN;
 	addr <<= 2;
-	if ((len = snprintf(buf, buflen, "B%s%s %d",
-	    (in & ARM_BRANCH_LBIT_MASK) != 0 ? "L" : "",
+	if ((len = snprintf(buf, buflen, "b%s%s %d",
+	    (in & ARM_BRANCH_LBIT_MASK) != 0 ? "l" : "",
 	    arm_cond_names[cc], (int)addr)) >= buflen)
 		return (-1);
 
@@ -2031,13 +2088,13 @@
 
 	switch (op) {
 	case 0x0:
-		opn = rn == ARM_REG_R15 ? "XTAB16" : "XTB16";
+		opn = rn == ARM_REG_R15 ? "xtab16" : "xtb16";
 		break;
 	case 0x2:
-		opn = rn == ARM_REG_R15 ? "XTAB" : "XTB";
+		opn = rn == ARM_REG_R15 ? "xtab" : "xtb";
 		break;
 	case 0x3:
-		opn = rn == ARM_REG_R15 ? "XTAH" : "XTH";
+		opn = rn == ARM_REG_R15 ? "xtah" : "xth";
 		break;
 	default:
 		return (-1);
@@ -2046,12 +2103,12 @@
 
 	if (rn == ARM_REG_R15) {
 		len = snprintf(buf, buflen, "%s%s%s %s, %s",
-		    sbit != 0 ? "U" : "S",
+		    sbit != 0 ? "u" : "s",
 		    opn, arm_cond_names[cc], arm_reg_names[rd],
 		    arm_reg_names[rn]);
 	} else {
 		len = snprintf(buf, buflen, "%s%s%s %s, %s, %s",
-		    sbit != 0 ? "U" : "S",
+		    sbit != 0 ? "u" : "s",
 		    opn, arm_cond_names[cc], arm_reg_names[rd],
 		    arm_reg_names[rn], arm_reg_names[rm]);
 	}
@@ -2094,7 +2151,7 @@
 			    ARM_MEDIA_HPACK_SHIFT_IMM;
 			len = snprintf(buf, buflen, "%s%s %s, %s, %s",
 			    (in & ARM_MEDIA_HPACK_OP_MASK) != 0 ?
-			    "PKHTB" : "PKHBT", arm_cond_names[cc],
+			    "pkhtb" : "pkhbt", arm_cond_names[cc],
 			    arm_reg_names[rd], arm_reg_names[rn],
 			    arm_reg_names[rd]);
 			if (len >= buflen)
@@ -2103,10 +2160,10 @@
 			if (op1 != 0) {
 				if (in & ARM_MEDIA_HPACK_OP_MASK)
 					len += snprintf(buf + len, buflen - len,
-					    ", ASR %d", op1);
+					    ", asr %d", op1);
 				else
 					len += snprintf(buf + len, buflen - len,
-					    ", LSL %d", op1);
+					    ", lsl %d", op1);
 			}
 			return (len >= buflen ? -1 : 0);
 		}
@@ -2119,7 +2176,7 @@
 			op2 = (in & ARM_MEDIA_SAT_SHI_MASK) >>
 			    ARM_MEDIA_SAT_SHI_SHIFT;
 			len = snprintf(buf, buflen, "%s%s %s, #%d, %s",
-			    (in & ARM_MEDIA_SAT_U_MASK) != 0 ? "USAT" : "SSAT",
+			    (in & ARM_MEDIA_SAT_U_MASK) != 0 ? "usat" : "ssat",
 			    arm_cond_names[cc], arm_reg_names[rd], op1,
 			    arm_reg_names[rm]);
 
@@ -2137,7 +2194,7 @@
 				if (snprintf(buf + len, buflen - len,
 				    ", %s #%d",
 				    (in & ARM_MEDIA_SAT_STYPE_MASK) != 0 ?
-				    "ASR" : "LSL", op2) >= buflen - len)
+				    "asr" : "lsl", op2) >= buflen - len)
 					return (-1);
 			}
 			return (0);
@@ -2149,7 +2206,7 @@
 			op1 = (in & ARM_MEDIA_RN_MASK) >> ARM_MEDIA_RN_SHIFT;
 			if (snprintf(buf, buflen, "%s%s %s, #%d, %s",
 			    (in & ARM_MEDIA_SAT_U_MASK) != 0 ?
-			    "USAT16" : "SSAT16",
+			    "usat16" : "ssat16",
 			    arm_cond_names[cc], arm_reg_names[rd], op1,
 			    arm_reg_names[rm]) >= buflen)
 				return (-1);
@@ -2159,7 +2216,7 @@
 		if ((in & ARM_MEDIA_REV_MASK) == ARM_MEDIA_REV_TARG) {
 			rd = (in & ARM_MEDIA_RD_MASK) >> ARM_MEDIA_RD_SHIFT;
 			rm = in & ARM_MEDIA_RM_MASK;
-			if (snprintf(buf, buflen, "REV%s %s, %s",
+			if (snprintf(buf, buflen, "rev%s %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rd]) >= buflen)
 				return (-1);
@@ -2169,7 +2226,7 @@
 		if ((in & ARM_MEDIA_BRPH_MASK) == ARM_MEDIA_BRPH_TARG) {
 			rd = (in & ARM_MEDIA_RD_MASK) >> ARM_MEDIA_RD_SHIFT;
 			rm = in & ARM_MEDIA_RM_MASK;
-			if (snprintf(buf, buflen, "REV16%s %s, %s",
+			if (snprintf(buf, buflen, "rev16%s %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rd]) >= buflen)
 				return (-1);
@@ -2179,7 +2236,7 @@
 		if ((in & ARM_MEDIA_BRSH_MASK) == ARM_MEDIA_BRSH_TARG) {
 			rd = (in & ARM_MEDIA_RD_MASK) >> ARM_MEDIA_RD_SHIFT;
 			rm = in & ARM_MEDIA_RM_MASK;
-			if (snprintf(buf, buflen, "REVSH%s %s, %s",
+			if (snprintf(buf, buflen, "revsh%s %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rd]) >= buflen)
 				return (-1);
@@ -2190,7 +2247,7 @@
 			rn = (in & ARM_MEDIA_RN_MASK) >> ARM_MEDIA_RN_SHIFT;
 			rd = (in & ARM_MEDIA_RD_MASK) >> ARM_MEDIA_RD_SHIFT;
 			rm = in & ARM_MEDIA_RM_MASK;
-			if (snprintf(buf, buflen, "SEL%s %s, %s, %s",
+			if (snprintf(buf, buflen, "sel%s %s, %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rn], arm_reg_names[rm]) >= buflen)
 				return (-1);
@@ -2226,15 +2283,15 @@
 				return (-1);
 			if (rn == ARM_REG_R15) {
 				len = snprintf(buf, buflen, "%s%s%s %s, %s, %s",
-				    op2 != 0 ? "SMUSD" : "SMUAD",
-				    xbit != 0 ? "X" : "X",
+				    op2 != 0 ? "smusd" : "smuad",
+				    xbit != 0 ? "x" : "x",
 				    arm_cond_names[cc], arm_reg_names[rd],
 				    arm_reg_names[rm], arm_reg_names[rs]);
 			} else {
 				len = snprintf(buf, buflen,
 				    "%s%s%s %s, %s, %s, %s",
-				    op2 != 0 ? "SMLSD" : "SMLAD",
-				    xbit != 0 ? "X" : "",
+				    op2 != 0 ? "smlsd" : "smlad",
+				    xbit != 0 ? "x" : "",
 				    arm_cond_names[cc], arm_reg_names[rd],
 				    arm_reg_names[rm], arm_reg_names[rs],
 				    arm_reg_names[rn]);
@@ -2243,8 +2300,8 @@
 		} else if (op1 == 0x8) {
 			if (op2 != 0x0)
 				return (-1);
-			len = snprintf(buf, buflen, "SMLALD%s%s %s, %s, %s, %s",
-			    xbit != 0 ? "X" : "",
+			len = snprintf(buf, buflen, "smlald%s%s %s, %s, %s, %s",
+			    xbit != 0 ? "x" : "",
 			    arm_cond_names[cc], arm_reg_names[rn],
 			    arm_reg_names[rd], arm_reg_names[rm],
 			    arm_reg_names[rs]);
@@ -2271,12 +2328,12 @@
 		rm = in & ARM_MEDIA_RM_MASK;
 
 		if (rn != ARM_REG_R15)
-			len = snprintf(buf, buflen, "USADA8%s %s, %s, %s, %s",
+			len = snprintf(buf, buflen, "usada8%s %s, %s, %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rm], arm_reg_names[rs],
 			    arm_reg_names[rn]);
 		else
-			len = snprintf(buf, buflen, "USAD8%s %s, %s, %s",
+			len = snprintf(buf, buflen, "usad8%s %s, %s, %s",
 			    arm_cond_names[cc], arm_reg_names[rd],
 			    arm_reg_names[rm], arm_reg_names[rs]);
 		return (len >= buflen ? -1 : 0);
@@ -2449,7 +2506,7 @@
 			 * lower 24 bits are the interrupt number. It's also
 			 * valid for it to run with a condition code.
 			 */
-			if (snprintf(buf, buflen, "SWI%s %d",
+			if (snprintf(buf, buflen, "swi%s %d",
 			    arm_cond_names[cc],
 			    in & ARM_SWI_IMM_MASK) >= buflen)
 				return (-1);
--- old/usr/src/uts/armv6/bcm2835/ml/locore.s	2015-01-26 17:25:38.641113302 -0500
+++ new/usr/src/uts/armv6/bcm2835/ml/locore.s	2015-01-26 17:25:38.648457213 -0500
@@ -97,11 +97,6 @@
 	orr	r3, r3, r4
 	mcr	p15, 0, r3, c1, c0, 0
 
-	/* Disable A (disables strict alignment checks) */
-	mrc	p15, 0, r3, c1, c0, 0
-	bic	r3, r3, #2
-	mcr	p15, 0, r3, c1, c0, 0
-
 	/* Enable access to p10 and p11 (privileged mode only) */
 	mrc	p15, 0, r0, c1, c0, 2
 	orr	r0, #0x00500000
--- old/usr/src/uts/armv6/loader/fakeloader_core.s	2015-01-26 17:25:38.849753122 -0500
+++ new/usr/src/uts/armv6/loader/fakeloader_core.s	2015-01-26 17:25:38.857176475 -0500
@@ -51,7 +51,8 @@
 	 */
 	ENTRY(fakeload_unaligned_enable)
 	mrc	p15, 0, r0, c1, c0, 0
-	orr	r0, #0x400000
+	orr	r0, #0x400000	/* U = 1 */
+	bic	r0, r0, #2	/* A = 0 */
 	mcr	p15, 0, r0, c1, c0, 0
 	bx	lr
 	SET_SIZE(fakeload_unaligned_enable);
--- old/usr/src/uts/armv6/ml/trap.s	2015-01-26 17:25:39.056711016 -0500
+++ new/usr/src/uts/armv6/ml/trap.s	2015-01-26 17:25:39.064137230 -0500
@@ -16,8 +16,7 @@
 
 /*
  * Create a section into which to place the exception vector, such that we can
- * force it to be mapped where it needs to be.  Currently at 0x0, since
- * we don't set the high vector bit (SCTLR.V)
+ * force it to be mapped where it needs to be.
  *
  * Each instruction in the vector jumps to its own address + 24, which is the
  * matching entry in exception_table.  We do this to insure that we get
