--- old/usr/src/uts/armv6/bcm2835/ml/locore.s	2015-02-07 18:57:48.200801652 -0500
+++ new/usr/src/uts/armv6/bcm2835/ml/locore.s	2015-02-07 18:57:48.208045607 -0500
@@ -18,99 +18,11 @@
 #include <sys/machparam.h>
 #include <sys/cpu_asm.h>
 
-/*
- * Every story needs a beginning. This is ours.
- */
-
-/*
- * We are in a primordial world here. The BMC2835 is going to come along and
- * boot us at _start. Normally we would go ahead and use a main() function, but
- * for now, we'll do that ourselves. As we've started the world, we also need to
- * set up a few things about us, for example our stack pointer. To help us out,
- * it's useful to remember the rough memory map. Remember, this is for physcial
- * addresses. There is no virtual memory here. These sizes are often manipulated
- * by the 'configuration' in the bootloader.
- *
- * +----------------+ <---- Max physical memory
- * |                |
- * |                |
- * |                |
- * +----------------+
- * |                |
- * |      I/O       |
- * |  Peripherals   |
- * |                |
- * +----------------+ <---- I/O base 0x20000000 (corresponds to 0x7E000000)
- * |                |
- * |     Main       |
- * |    Memory      |
- * |                |
- * +----------------+ <---- Top of SDRAM
- * |                |
- * |       VC       |
- * |     SDRAM      |
- * |                |
- * +----------------+ <---- Split determined by bootloader config
- * |                |
- * |      ARM       |
- * |     SDRAM      |
- * |                |
- * +----------------+ <---- Bottom of physical memory 0x00000000
- *
- * With the Raspberry Pi Model B, we have 512 MB of SDRAM. That means we have a
- * range of addresses from [0, 0x20000000). If we assume that the minimum amount
- * of DRAM is given to the GPU - 32 MB, that means we really have the following
- * range: [0, 0x1e000000).
- *
- * By default, this binary will be loaded into 0x8000. For now, that means we
- * will set our initial stack to 0x10000000.
- */
-
-/*
- * Recall that _start is the traditional entry point for an ELF binary.
- */
-	ENTRY(_start)
-	ldr sp, =t0stack
-	ldr r4, =DEFAULTSTKSZ
-	add sp, r4
-	bic sp, sp, #0xff
-
-	/*
-	 * establish bogus stacks for exceptional CPU states, our exception
-	 * code should never make use of these, and we want loud and violent
-	 * failure should we accidentally try.
-	 */
-	cps #(CPU_MODE_UND)
-	mov sp, #-1
-	cps #(CPU_MODE_ABT)
-	mov sp, #-1
-	cps #(CPU_MODE_FIQ)
-	mov sp, #-1
-	cps #(CPU_MODE_IRQ)
-	mov sp, #-1
-	cps #(CPU_MODE_SVC)
-
-	/* Enable highvecs (moves the base of the exception vector) */
-	mrc	p15, 0, r3, c1, c0, 0
-	mov	r4, #1
-	lsl	r4, r4, #13
-	orr	r3, r3, r4
-	mcr	p15, 0, r3, c1, c0, 0
-
+	ENTRY(_mach_start)
 	/* Enable access to p10 and p11 (privileged mode only) */
 	mrc	p15, 0, r0, c1, c0, 2
 	orr	r0, #0x00500000
 	mcr	p15, 0, r0, c1, c0, 2
 
-	bl _fakebop_start
-	SET_SIZE(_start)
-
-	ENTRY(arm_reg_read)
-	ldr r0, [r0]
-	bx lr
-	SET_SIZE(arm_reg_read)
-
-	ENTRY(arm_reg_write)
-	str r1, [r0]
-	bx lr
-	SET_SIZE(arm_reg_write)
+	bx	r14
+	SET_SIZE(_mach_start)
--- old/usr/src/uts/armv6/ml/glocore.s	2015-02-07 18:57:48.404638133 -0500
+++ new/usr/src/uts/armv6/ml/glocore.s	2015-02-07 18:57:48.411906005 -0500
@@ -20,14 +20,29 @@
 
 #include "assym.h"
 
-#if defined(__lint)
-
-#endif
+/*
+ * Every story needs a beginning. This is ours.
+ */
 
 /*
  * Each of the different machines has its own locore.s to take care of getting
- * us into fakebop for the first time. After that, they all return here to a
- * generic locore to take us into mlsetup and then to main forever more.
+ * the machine specific setup done.  Just before jumping into fakebop the
+ * first time, we call this machine specific code.
+ */
+
+/*
+ * We are in a primordial world here. The loader is going to come along and
+ * boot us at _start. As we've started the world, we also need to set up a
+ * few things about us, for example our stack pointer. To help us out, it's
+ * useful to remember what the loader set up for us:
+ *
+ * - unaligned access are allowed (A = 0, U = 1)
+ * - virtual memory is enabled
+ *   - we (unix) are mapped right were we want to be
+ *   - a UART has been enabled & any memory mapped registers have been 1:1
+ *     mapped
+ *   - ATAGs have been updated to tell us what the mappings are
+ * - I/D L1 caches have been enabled
  */
 
 	/*
@@ -44,6 +59,45 @@
 	.comm	t0stack, DEFAULTSTKSZ, 32
 	.comm	t0, 4094, 32
 
+
+/*
+ * Recall that _start is the traditional entry point for an ELF binary.
+ */
+	ENTRY(_start)
+	ldr	sp, =t0stack
+	ldr	r4, =DEFAULTSTKSZ
+	add	sp, r4
+	bic	sp, sp, #0xff
+
+	/*
+	 * establish bogus stacks for exceptional CPU states, our exception
+	 * code should never make use of these, and we want loud and violent
+	 * failure should we accidentally try.
+	 */
+	cps	#(CPU_MODE_UND)
+	mov	sp, #-1
+	cps	#(CPU_MODE_ABT)
+	mov	sp, #-1
+	cps	#(CPU_MODE_FIQ)
+	mov	sp, #-1
+	cps	#(CPU_MODE_IRQ)
+	mov	sp, #-1
+	cps	#(CPU_MODE_SVC)
+
+	/* Enable highvecs (moves the base of the exception vector) */
+	mrc	p15, 0, r3, c1, c0, 0
+	mov	r4, #1
+	lsl	r4, r4, #13
+	orr	r3, r3, r4
+	mcr	p15, 0, r3, c1, c0, 0
+
+	/* invoke machine specific setup */
+	bl	_mach_start
+
+	bl	_fakebop_start
+	SET_SIZE(_start)
+
+
 #if defined(__lint)
 
 /* ARGSUSED */
@@ -142,3 +196,13 @@
 __return_from_main:
 	.string "main() returned"
 #endif	/* __lint */
+
+	ENTRY(arm_reg_read)
+	ldr r0, [r0]
+	bx lr
+	SET_SIZE(arm_reg_read)
+
+	ENTRY(arm_reg_write)
+	str r1, [r0]
+	bx lr
+	SET_SIZE(arm_reg_write)
--- old/usr/src/uts/armv6/qvpb/ml/locore.s	2015-02-07 18:57:48.610837594 -0500
+++ new/usr/src/uts/armv6/qvpb/ml/locore.s	2015-02-07 18:57:48.618007075 -0500
@@ -11,100 +11,14 @@
 
 /*
  * Copyright 2013 (c) Joyent, Inc. All rights reserved.
+ * Copyright 2015 (c) Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  */
 
 #include <sys/asm_linkage.h>
 #include <sys/machparam.h>
 #include <sys/cpu_asm.h>
 
-/*
- * Every story needs a beginning. This is ours.
- */
-
-/*
- * We are in a primordial world here. The BMC2835 is going to come along and
- * boot us at _start. Normally we would go ahead and use a main() function, but
- * for now, we'll do that ourselves. As we've started the world, we also need to
- * set up a few things about us, for example our stack pointer. To help us out,
- * it's useful to remember the rough memory map. Remember, this is for physcial
- * addresses. There is no virtual memory here. These sizes are often manipulated
- * by the 'configuration' in the bootloader.
- *
- * +----------------+ <---- Max physical memory
- * |                |
- * |                |
- * |                |
- * +----------------+
- * |                |
- * |      I/O       |
- * |  Peripherals   |
- * |                |
- * +----------------+ <---- I/O base 0x20000000 (corresponds to 0x7E000000)
- * |                |
- * |     Main       |
- * |    Memory      |
- * |                |
- * +----------------+ <---- Top of SDRAM
- * |                |
- * |       VC       |
- * |     SDRAM      |
- * |                |
- * +----------------+ <---- Split determined by bootloader config
- * |                |
- * |      ARM       |
- * |     SDRAM      |
- * |                |
- * +----------------+ <---- Bottom of physical memory 0x00000000
- *
- * With the Raspberry Pi Model B, we have 512 MB of SDRAM. That means we have a
- * range of addresses from [0, 0x20000000). If we assume that the minimum amount
- * of DRAM is given to the GPU - 32 MB, that means we really have the following
- * range: [0, 0x1e000000).
- *
- * By default, this binary will be loaded into 0x8000. For now, that means we
- * will set our initial stack to 0x10000000.
- */
-
-/*
- * Recall that _start is the traditional entry point for an ELF binary.
- */
-	ENTRY(_start)
-	ldr sp, =t0stack
-	ldr r4, =DEFAULTSTKSZ
-	add sp, r4
-	bic sp, sp, #0xff
-
-	/*
-	 * establish bogus stacks for exceptional CPU states, our exception
-	 * code should never make use of these, and we want loud and violent
-	 * failure should we accidentally try.
-	 */
-	cps #(CPU_MODE_UND)
-	mov sp, #-1
-	cps #(CPU_MODE_ABT)
-	mov sp, #-1
-	cps #(CPU_MODE_FIQ)
-	mov sp, #-1
-	cps #(CPU_MODE_IRQ)
-	mov sp, #-1
-	cps #(CPU_MODE_SVC)
-
-	/* Enable highvecs (moves the base of the exception vector) */
-	mrc	p15, 0, r3, c1, c0, 0
-	mov	r4, #1
-	lsl	r4, r4, #13
-	orr	r3, r3, r4
-	mcr	p15, 0, r3, c1, c0, 0
-
-	bl _fakebop_start
-	SET_SIZE(_start)
-
-	ENTRY(arm_reg_read)
-	ldr r0, [r0]
-	bx lr
-	SET_SIZE(arm_reg_read)
-
-	ENTRY(arm_reg_write)
-	str r1, [r0]
-	bx lr
-	SET_SIZE(arm_reg_write)
+	ENTRY(_mach_start)
+	/* nothing to do */
+	bx	r14
+	SET_SIZE(_mach_start)
