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6263 add missing cc clobbers to intel atomic inlines

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          --- old/usr/src/uts/intel/asm/atomic.h
          +++ new/usr/src/uts/intel/asm/atomic.h
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  16   16   * If applicable, add the following below this CDDL HEADER, with the
  17   17   * fields enclosed by brackets "[]" replaced with your own identifying
  18   18   * information: Portions Copyright [yyyy] [name of copyright owner]
  19   19   *
  20   20   * CDDL HEADER END
  21   21   */
  22   22  /*
  23   23   * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  24   24   * Use is subject to license terms.
  25   25   * Copyright 2014 Nexenta Systems, Inc.  All rights reserved.
       26 + * Copyright 2015 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  26   27   */
  27   28  
  28   29  #ifndef _ASM_ATOMIC_H
  29   30  #define _ASM_ATOMIC_H
  30   31  
  31   32  #include <sys/ccompile.h>
  32   33  #include <sys/types.h>
  33   34  
  34   35  #ifdef  __cplusplus
  35   36  extern "C" {
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  75   76  #endif
  76   77  
  77   78  #if defined(__amd64) || defined(__i386)
  78   79  
  79   80  #define __ATOMIC_OPXX(fxn, type, op)                                    \
  80   81  extern __GNU_INLINE void                                                \
  81   82  fxn(volatile type *target)                                              \
  82   83  {                                                                       \
  83   84          __asm__ __volatile__(                                           \
  84   85              "lock; " op " %0"                                           \
  85      -            : "+m" (*target));                                          \
       86 +            : "+m" (*target)                                            \
       87 +            : /* no inputs */                                           \
       88 +            : "cc");                                                    \
  86   89  }
  87   90  
  88   91  __ATOMIC_OPXX(atomic_inc_8,      uint8_t,  "inc" SUF_8)
  89   92  __ATOMIC_OPXX(atomic_inc_16,     uint16_t, "inc" SUF_16)
  90   93  __ATOMIC_OPXX(atomic_inc_32,     uint32_t, "inc" SUF_32)
  91   94  __ATOMIC_OP64(atomic_inc_64,     uint64_t, "inc" SUF_64)
  92   95  __ATOMIC_OPXX(atomic_inc_uchar,  uchar_t,  "inc" SUF_8)
  93   96  __ATOMIC_OPXX(atomic_inc_ushort, ushort_t, "inc" SUF_16)
  94   97  __ATOMIC_OPXX(atomic_inc_uint,   uint_t,   "inc" SUF_32)
  95   98  __ATOMIC_OPXX(atomic_inc_ulong,  ulong_t,  "inc" SUF_LONG)
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 105  108  
 106  109  #undef __ATOMIC_OPXX
 107  110  
 108  111  #define __ATOMIC_OPXX(fxn, type1, type2, op, reg)                       \
 109  112  extern __GNU_INLINE void                                                \
 110  113  fxn(volatile type1 *target, type2 delta)                                \
 111  114  {                                                                       \
 112  115          __asm__ __volatile__(                                           \
 113  116              "lock; " op " %1,%0"                                        \
 114  117              : "+m" (*target)                                            \
 115      -            : "i" reg (delta));                                         \
      118 +            : "i" reg (delta)                                           \
      119 +            : "cc");                                                    \
 116  120  }
 117  121  
 118  122  __ATOMIC_OPXX(atomic_add_8,     uint8_t,  int8_t,      "add" SUF_8,    "q")
 119  123  __ATOMIC_OPXX(atomic_add_16,    uint16_t, int16_t,     "add" SUF_16,   "r")
 120  124  __ATOMIC_OPXX(atomic_add_32,    uint32_t, int32_t,     "add" SUF_32,   "r")
 121  125  __ATOMIC_OP64(atomic_add_64,    uint64_t, int64_t,     "add" SUF_64,   "r")
 122  126  __ATOMIC_OPXX(atomic_add_char,  uchar_t,  signed char, "add" SUF_8,    "q")
 123  127  __ATOMIC_OPXX(atomic_add_short, ushort_t, short,       "add" SUF_16,   "r")
 124  128  __ATOMIC_OPXX(atomic_add_int,   uint_t,   int,         "add" SUF_32,   "r")
 125  129  __ATOMIC_OPXX(atomic_add_long,  ulong_t,  long,        "add" SUF_LONG, "r")
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 130  134   * **'.
 131  135   */
 132  136  extern __GNU_INLINE void
 133  137  atomic_add_ptr(volatile void *target, ssize_t delta)
 134  138  {
 135  139          volatile void **tmp = (volatile void **)target;
 136  140  
 137  141          __asm__ __volatile__(
 138  142              "lock; add" SUF_PTR " %1,%0"
 139  143              : "+m" (*tmp)
 140      -            : "ir" (delta));
      144 +            : "ir" (delta)
      145 +            : "cc");
 141  146  }
 142  147  
 143  148  __ATOMIC_OPXX(atomic_or_8,       uint8_t,  uint8_t,  "or" SUF_8,    "q")
 144  149  __ATOMIC_OPXX(atomic_or_16,      uint16_t, uint16_t, "or" SUF_16,   "r")
 145  150  __ATOMIC_OPXX(atomic_or_32,      uint32_t, uint32_t, "or" SUF_32,   "r")
 146  151  __ATOMIC_OP64(atomic_or_64,      uint64_t, uint64_t, "or" SUF_64,   "r")
 147  152  __ATOMIC_OPXX(atomic_or_uchar,   uchar_t,  uchar_t,  "or" SUF_8,    "q")
 148  153  __ATOMIC_OPXX(atomic_or_ushort,  ushort_t, ushort_t, "or" SUF_16,   "r")
 149  154  __ATOMIC_OPXX(atomic_or_uint,    uint_t,   uint_t,   "or" SUF_32,   "r")
 150  155  __ATOMIC_OPXX(atomic_or_ulong,   ulong_t,  ulong_t,  "or" SUF_LONG, "r")
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