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XXXX introduce drv_sectohz


 483         off_t bar_size;
 484         ddi_device_acc_attr_t mattr = {
 485                 DDI_DEVICE_ATTR_V0,
 486                 DDI_STRUCTURE_LE_ACC,
 487                 DDI_STRICTORDER_ACC
 488         };
 489         uint32_t addr_reg_off = 0x260, data_reg_off = 0x264, data = 0x6BE4;
 490 
 491         if (vendorid != PXB_VENDOR_PLX)
 492                 return;
 493         if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS)
 494                 return;
 495         if (nregs < 2)       /* check for CONF entry only, no BARs */
 496                 return;
 497         if (ddi_dev_regsize(dip, 1, &bar_size) != DDI_SUCCESS)
 498                 return;
 499         if (ddi_regs_map_setup(dip, 1, (caddr_t *)&mp, 0, bar_size,
 500             &mattr, &h) != DDI_SUCCESS)
 501                 return;
 502         ddi_put32(h, (uint32_t *)((uchar_t *)mp + addr_reg_off), data);
 503         delay(drv_usectohz(1000000));
 504         printf("%s#%d: EEPROM StatusReg = %x, CRC = %x\n",
 505             ddi_driver_name(dip), ddi_get_instance(dip),
 506             ddi_get32(h, (uint32_t *)((uchar_t *)mp + addr_reg_off)),
 507             ddi_get32(h, (uint32_t *)((uchar_t *)mp + data_reg_off)));
 508 #ifdef PLX_HOT_RESET_DISABLE
 509         /* prevent hot reset from propogating downstream. */
 510         data = ddi_get32(h, (uint32_t *)((uchar_t *)mp + 0x1DC));
 511         ddi_put32(h, (uint32_t *)((uchar_t *)mp + 0x1DC), data | 0x80000);
 512         delay(drv_usectohz(1000000));
 513         printf("%s#%d: EEPROM 0x1DC prewrite=%x postwrite=%x\n",
 514             ddi_driver_name(dip), ddi_get_instance(dip), data,
 515             ddi_get32(h, (uint32_t *)((uchar_t *)mp + 0x1DC)));
 516 #endif /* PLX_HOT_RESET_DISABLE */
 517         ddi_regs_map_free(&h);
 518 }
 519 #endif /* PRINT_PLX_SEEPROM_CRC */
 520 #endif /* PX_PLX */


 483         off_t bar_size;
 484         ddi_device_acc_attr_t mattr = {
 485                 DDI_DEVICE_ATTR_V0,
 486                 DDI_STRUCTURE_LE_ACC,
 487                 DDI_STRICTORDER_ACC
 488         };
 489         uint32_t addr_reg_off = 0x260, data_reg_off = 0x264, data = 0x6BE4;
 490 
 491         if (vendorid != PXB_VENDOR_PLX)
 492                 return;
 493         if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS)
 494                 return;
 495         if (nregs < 2)       /* check for CONF entry only, no BARs */
 496                 return;
 497         if (ddi_dev_regsize(dip, 1, &bar_size) != DDI_SUCCESS)
 498                 return;
 499         if (ddi_regs_map_setup(dip, 1, (caddr_t *)&mp, 0, bar_size,
 500             &mattr, &h) != DDI_SUCCESS)
 501                 return;
 502         ddi_put32(h, (uint32_t *)((uchar_t *)mp + addr_reg_off), data);
 503         delay(drv_sectohz(1));
 504         printf("%s#%d: EEPROM StatusReg = %x, CRC = %x\n",
 505             ddi_driver_name(dip), ddi_get_instance(dip),
 506             ddi_get32(h, (uint32_t *)((uchar_t *)mp + addr_reg_off)),
 507             ddi_get32(h, (uint32_t *)((uchar_t *)mp + data_reg_off)));
 508 #ifdef PLX_HOT_RESET_DISABLE
 509         /* prevent hot reset from propogating downstream. */
 510         data = ddi_get32(h, (uint32_t *)((uchar_t *)mp + 0x1DC));
 511         ddi_put32(h, (uint32_t *)((uchar_t *)mp + 0x1DC), data | 0x80000);
 512         delay(drv_sectohz(1));
 513         printf("%s#%d: EEPROM 0x1DC prewrite=%x postwrite=%x\n",
 514             ddi_driver_name(dip), ddi_get_instance(dip), data,
 515             ddi_get32(h, (uint32_t *)((uchar_t *)mp + 0x1DC)));
 516 #endif /* PLX_HOT_RESET_DISABLE */
 517         ddi_regs_map_free(&h);
 518 }
 519 #endif /* PRINT_PLX_SEEPROM_CRC */
 520 #endif /* PX_PLX */